Personal data
Sex: Male Mobile: 137-****7981
Degree: MSEE Major: Circuit and System
Date of Birth: 11/30/1979 Email: [email protected]
Objective
To pursue an R&D engineer in digital predistortion algorithms for RF power amplifiers.
Education
l 08/2002-03/2005 Xidian University, MSEE in Electric Engineering;
l 08/1998-07/2002 Xidian University, BSEE in Measure-control and Instruments.
Professional Experience
04/2005-present
R&D on the algorithm of digital predistortion for RF power amplifier and the realization in FPGA :
l Clipping and crest factor reduction algorithm
l FIR filter implement in FPGA
l Power amplifier character measurement (i.e. AM/AM and AM/PM character)
l Lookup table (LUT) index method
l Square root, Sin and cos implement in FPGA
l Research on the autoadaptation algorithm on updating the LUT
l Research on the algorithm of adjusting the distortion of AQM and AQDM
l Research on the algorithm of memory effect reduction for RF power amplifier
08/2002-03/2005
R&D on OFDM algorithm, such as synchronization and PAPR reduction:
l A novel time-domain frequency synchro_ nization method for OFDM systems
l A novel side information transmission scheme for PAPR reduction in OFDM systems (EI: 05269178700, China patent NO. 200510124567.0)
English Proficiency
CET－6 (passed); Graduate English Test (good)
Personal character
Creative; self-education; responsible
